- Very valuable understanding of timing requirements,synthesis flows and experience in formal verification flows
- Very good understanding of system level architecture and validation flows
- Good hands- on expertise in Perl,Shell and Unix scripting . .
- Strong in digital design fundamentals
- Expertise in micro architecture development, design, RTL Coding & integration of IP blocks in ASIC/ SoC designs
- Very good understanding of timing requirements, synthesis flows and experience in formal verification flows
- Design for test and Design for debug (DFx) is a plus
- Very good understanding of system level architecture and validation flows
- Highly motivated individuals and ability to deal with ambiguity
- Ability to work in a team environment
- Good hands- on expertise in Perl, Shell and Unix scripting