Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco our investors include Benchmark General Catalyst Peter Thiel Adam DAngelo Larry Summers and Jack Dorsey.
- Review each task end to end including the specification starting files reference solution and tests.
- Confirm tasks are fair and solvable ensuring the reference solution passes and tests are comprehensive.
- Identify flaws such as ambiguous specifications inadequate tests leaked answers and misleading task difficulty.
- Evaluate whether tasks challenge todays best AI models effectively.
- Provide transparent specific feedback and suggest fixes while shaping new task ideas.
Qualifications
Must-Have
- 5 years of hands-on RTL design or verification experience in industry (semiconductor FPGA EDA or similar).
- Solid Verilog / SystemVerilog skills and experience with simulation and testbenches.
- Ability to read and reason about Python test code.
- A careful skeptical reviewer who can explain in writing why a task is broken or too easy.
Preferred
- Experience with open-source EDA tools (e.g. Icarus Verilog Verilator Yosys cocotb) formal verification or reviewing benchmarks for AI models.
Start Date
- Immediate
Application Process (Takes 2030 mins to complete)
- Upload resume
- AI interview based on your resume
- Submit form
Resources & Support
- For details about the interview process and platform information please check:
- For any help or support reach out to:
PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.