Verification Engineer - UVM | OVM (Pune)

Verification Engineer - UVM | OVM (Pune)

14 Nov
|
Vitestork Consulting
|
Pune

14 Nov

Vitestork Consulting

Pune

Job highlights

- Bachelors or Masters degree in Electrical,Electronics or Computer Engineering with 5-15 years of relevant industry in pre-Si Validation domain
- Experience with advanced verification techniques such as formal and assertions is highly desired. Valuable knowledge of digital logic design,chip architecture and microarchitecture.
- Experience in OOP concepts,coverage based random validation

1) Verification Engineer - UVM | OVM - [ID 008]

Bachelors or Masters degree in Electrical, Electronics or Computer Engineering with 5-15 years of relevant industry in pre-Si Validation domain

Relevant ASIC design/validation experience in front end processes including SOC level RTL functional, performance and power verification.

Strong depth in knowledge of Validation for performance and power targets.

Experience with advanced verification techniques such as formal and assertions is highly desired.

Good knowledge of digital logic design,



chip architecture and microarchitecture.

Expertise in System Verilog and OVM or UVM based verification methodologies

Experience in OOP concepts, coverage based random validation

Experience in one/more of the following areas AI/Networking IPs, Storage, Manageability, RAS, TSN

Experience in one/more of the following areas Memory Controller , Reset, Clock, Fuse, DFD, Power Management, Networking, Graphics, F

Skills:

UVM, OVM, SV, RTL

Job Location:

Bangalore | Hyderabad | Pune | Noida

Experience:

5 - 15 Years

Company Name:

Semiconductor RD

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Verification Engineer - UVM | OVM (Pune)
🏢 Vitestork Consulting
📍 Pune

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