Job highlights

- Atleast 2years of experience on HVL (System Verilog,Vera,Specman,E,VMM,OVM,UVM)x000D

- Should be able to work independently and able to guide others_x000D_

- Testbench architecture,coding and valuable understanding of design issues in RTL_x000D_

- Experience on System C would be an added plus_x000D_

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Worked on SoC level testbench and verification environment_x000D_

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Testbench architecture, coding and good understanding of design issues in RTL_x000D_

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Testbench generation, testvector creation, simulations, gate level simulations_x000D_

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Hands on with System Verilog and Assertion based verification methodology _x000D_

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Atleast 2years of experience on HVL (System Verilog, Vera, Specman, E, VMM, OVM, UVM)_x000D_

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Should be able to work independently and able to guide others_x000D_

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The role requires this person to be the point of contact for handling and resolving technical queries for other engineers in the team._x000D_

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Committed and passionate for technical work._x000D_

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Added Advantage: _x000D_

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Knowledge of RTL coding styles _x000D_

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Low power verification (UPF/CPF) would be an added plus_x000D_

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Experience on System C would be an added plus_x000D_

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Worked on protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USB_x000D_

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Education_x000D_

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BE/B-Tech (Electronics/ Electrical/ Electronics &Comm;) or MSc (VLSI/ Electronics/ Electrical/ Electronics &Comm;) or MS / MTech would be preferred_x000D_

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📌 Senior Verification Engineer (Bengaluru)
🏢 Truechip Solutions Private
📍 Bengaluru