- 5-15 years experience in RTL design with expertise in Verilog/VHDL and ARM SoC architecture
- Execute RTL design and coding, integrate ARM core-based SoCs, work with AMBA Bus protocols, perform lint and CDC analysis, utilize FPGA prototyping, and conduct ASIC synthesis
Exp: 5-15yrs Responsibilities: Execute RTL design and coding with expert-level proficiency Integrate ARM core-based designs into SoCs, ensuring seamless compatibility Work with AMBA Bus protocols, including AXI, AHB, APB Conduct Lint and CDC..
Required Candidate profile d CDC analysis for design robustness Utilize FPGA-based designs or FPGA prototyping for development Apply in-depth knowledge of Verilog/VHDL and ARM SoC architecture Perform ASIC synthesis and Stati..