Low-Power Verification Engineer (Bengaluru)

Low-Power Verification Engineer (Bengaluru)

14 Nov
|
Proxelera
|
Bengaluru

14 Nov

Proxelera

Bengaluru

Job highlights

- . 3 6 years of experience in Design Verification (DV) . Robust understanding of low-power design concepts and multi-power domain architectures . Hands-on experience with UPF and power-aware verification flows . Proficiency in SystemVerilog (SV) and UVM .
- Experience: 3-6 Yrs in Low power verification . .

Job Title: Low-Power Verification Engineer - 3-6Yrs Experience: 3-6 Yrs in Low power verification

Location: Bangalore

We are seeking a Low-Power Verification Engineer with hands-on experience in verifying designs with multiple power domains. The candidate will be responsible for ensuring correct functionality and power intent implementation using UPF in complex SoC environments.

Key Responsibilities:

- Develop and execute verification plans for low-power designs with multiple power domains
- Verify power intent using UPF (Unified Power Format)
- Build and enhance SystemVerilog/UVM-based testbenches (TB) for low-power verification
- Validate power management features such as power gating, isolation, retention, and level shifters
- Perform power-aware simulations and debug issues related to power state transitions
- Develop test scenarios for different power modes and ensure functional correctness across modes
- Analyze failures, debug power-related issues,



and work with design teams for resolution
- Drive functional and power coverage closure
- Ensure compliance with low-power design methodologies and guidelines

Required Skills:

- 3 6 years of experience in Design Verification (DV)
- Solid understanding of low-power design concepts and multi-power domain architectures
- Hands-on experience with UPF and power-aware verification flows
- Proficiency in SystemVerilog (SV) and UVM
- Experience in developing testbenches and test plans
- Knowledge of isolation cells, retention registers, and level shifters
- Strong debugging skills using simulators (VCS, Questa, Xcelium)

Preferred Qualifications:

- Experience with SoC-level verification
- Familiarity with clock/power domain crossings (CDC/PDC)
- Exposure to formal low-power verification techniques

- Scripting skills (Python/Perl/Shell)
- Understanding of power estimation and optimization techniques

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Low-Power Verification Engineer (Bengaluru)
🏢 Proxelera
📍 Bengaluru

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