DFT Engineer (Bengaluru)

DFT Engineer (Bengaluru)

14 Nov
|
Qualcomm
|
Bengaluru

14 Nov

Qualcomm

Bengaluru

Job highlights

- Bachelor's or Master's in Computer Science/Electrical/Electronics Engineering with 1+ year experience in RTL/GLS verification, Verilog/SV, UVM, Python/Perl scripting, and knowledge of JTAG, SOC architecture, and bus/serial protocols

- Perform RTL/GLS verification at SOC level, debug RTL/Netlist/Timing issues, use Verdi and VCS tools, generate vectors, support post silicon validation, and develop C-based testcases integrated in SV UVM environment

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

- Good communication skills

- Experience in RTL/GLS verification at SOC.

- Valuable in Verilog/SV and familiarity with basic concepts of UVM and C-based test case bring up.

- Experience in Python/Perl or any other scripting tools.

- Knowledge in GLS/SDF debugs and problem solving.

- Knowledge in JTAG protocols and Boundary Scan architecture Verification.

- Knowledge in ARM based SOC architecture.

- Knowledge in Bus protocols (AHB, AXI, APB), Serial protocols (I2C, SPI, UART) and Peripherals(USB2/3, PCIE, UFS) PHYs.





- Debugging knowledge from Assertions/waveform dumps.

Minimum Qualifications

- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Engineer, Senior(Exp : 2-5 years) :

- Responsible for RTL/GLS verification at SOC. Identifying issues in RTL/Netlist/Timing DBs and work with Design/PD teams.

- Working in tools Verdi and VCS for Pre Silicon verification.

- Vector generation and providing Post Silicon validation support to TE teams.

- Develop C based testcases and integrate in SV UVM environment in SOC level.

- Understand core level tests and create SOC level test plan and test cases.

📌 DFT Engineer (Bengaluru)
🏢 Qualcomm
📍 Bengaluru

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