Hands on in Gate level and UPF based low power Simulation.
Hands-on experiences on SV and using Verification Methodologies such as UVM/Specman-e
Assertion based Formal verification is a plus.
Sound understanding of Vplan/Vmanager Setup, Run regression and debug simulation.
Functional and code coverage .
The hire works with overseas teams. Transparent written/verbal communication skill is a must.
Familiarity on PIPE Interface specification for PCIe, Ethernet protocols.
Familiarity in mixed signal IP (SerDes, DDR) verification will be plus.
Skills:
Low Power Verification, UPF
Job Location:
Bengaluru
Experience:
4 - 8 Years
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