05 Aug
|
NXP Semiconductors
|
Mumbai
05 Aug
NXP Semiconductors
Mumbai
Design For Test (DFT) Engineer
Experience: Not Available to Not Available years
Location: Chandler, Arizona, United States
Skills: Python, AI, system Verilog
Duties and Responsibilities
In this position, the selected candidate will have a strong learning opportunity on state of the art mixed-signal design for test flow, and improve the efficiency using strong automation skills. The responsibilities will include:
Study the existing DfT workflow.
Identify and develop automation to expedite impactful parts of the workflow
Deliver end to end efficiency in workstream using AI-assisted automation.
Candidate should have:
Solid communication and problem-solving skills.
Excellent scripting proficiency in Python.
Basic knowledge of AI agents and agentic AI
Knowledge of system Verilog is a plus
Currently pursuing a BS or MS degree in Electrical Engineering, Computer Engineering, or similar
In order to be considered for an internship with NXP, you must be returning to school (or graduating) at the conclusion of the internship term. If you are graduating before August 2026, please only apply for Entry Level or other full time roles.
More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-e41b
📌 Design For Test (DFT) Engineer (Mumbai)
🏢 NXP Semiconductors
📍 Mumbai