Junior Mixed Signal Verification Engineer

Experience: Not Available to Not Available years

Location: Catania

Skills: Verilog, System Verilog, Verilog-AMS, Verilog-A, Analog Mixed Signal design, Analog Mixed Signal verification, teamwork skills

Company Overview

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and effective automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge.

This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will produce world-class products at a world-class pace. This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products.





We are now hiring a junior Mixed Signal Verification engineer for ensuring high quality designs that meet requirements by working closely with designers and systems engineers and creating simulation test cases, models, checkers and alike.

Job Responsibility

Work with the global design teams to develop complex SOC with a high degree of quality standard. Develop SV Real Number and Verilog-AMS models for analog blocks. Run simulations and track coverage of verification plans. Find design bugs/issues in architecture/design of Analog/Mixed Signal IPs in terms of functional verification, robustness checks with latest verification methodologies. Top level analysis & verification of test-modes & DFT strategy for analog blocks.

Your Profile

Bachelor's Degree in Electronic Engineering, Masters degree is preferred. A good understanding of analog and mixed-signal fundamentals is preferred. Knowledge in Verilog, System Verilog, Verilog-AMS and/or Verilog-A is a plus. 6 months experience in Analog Mixed Signal design/verification is a plus. Strong communication and team work skills are required. English (read, spoken, written) is a must.

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