06 Aug
|
Vitestork Consulting
|
Pune
06 Aug
Vitestork Consulting
Pune
1) FPGA RTL Design Engineer - [ID 022]
Job Description
Thorough understanding of digital design, RTL coding and simulation.
Involved in architectural and micro architecture design.
Experienced in Lint, CDC, logic synthesis, formal verification and static timing analysis.
Worked with physical design team for layout implementation.
Familiar with low power methodology and flow.
Capable of debugging EDA tool issues or design related issues.
Knowledge in DFT is a must.
Valuable scripting skill using Tcl, Perl and/or Awk
Protocol knowledge and experience in SAS/SATA, PCI-Express, serial peripherals is plus
REQUIREMENTS
Bachelor degree in Electronics or Electrical Engineering minimum
5+ years of experience in VLSI / RTL design.
Masters Degree in Electronics or Electrical Engineering or equivalent (preferred)
Highly self-motivated, well organized and result or
Skills:
FPGA, RTL, CDC, Lint, Micro-Architecture
Job Location:
Bangalore | Hyderabad | Pune | Noida
Experience:
4 - 18 Years
Company Name:
Well Established Semiconductor Services
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
📌 FPGA RTL Design Engineer (Pune)
🏢 Vitestork Consulting
📍 Pune