ASIC Design & Verification Engineer (Hyderabad)

ASIC Design & Verification Engineer (Hyderabad)

06 Aug
|
Chipsolve Technologies
|
Hyderabad

06 Aug

Chipsolve Technologies

Hyderabad

Roles and Responsibilities

- Good working knowledge on SystemC
- Design verification using UVM, SystemVerilog, and SystemC.
- Develop testbenches for SoC verification, IP Verification

Desired Candidate Profile

- 3 - 10+ Years of experience in SOC Verification, IP Verification
- Good working knowledge on SystemC
- Solid understanding of digital design principles and verification methodologies.
- Added advantage of having programming languages such as C, C++, Python

Salary:

- The salary range will be from 10L to 25L

📌 ASIC Design & Verification Engineer (Hyderabad)
🏢 Chipsolve Technologies
📍 Hyderabad

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: asic design & verification engineer (hyderabad) / hyderabad

Subscribe to this job alert:

Get the latest job offers by email for: asic design & verification engineer (hyderabad) / hyderabad