Physical Design Engineer

Experience: Not Available to Not Available years

Location: Shanghai, China

Skills: EDA tools, Synopsys, ICC2, FC, PT, STAR-RC, Cadence, EDI, Innovus, Voltus, Clock Distribution, Power Distribution, P&R;, Timing closure, RC Extraction, physical verification tools, ICV, Calibre, Perl, Python, TCL, Makefile scripts

Company Overview
We are now looking for a Physical Design Engineer. VLSI Physical Design Team at NVIDIA Shanghai has been built up since 2005. The team has made contribution to various successful products launched by NVIDIA Corporation over 15 years. We utilize latest process technology, advanced EDA tools, and sophisticated design methodology. We always work on the most challenging designs, and push for performance limit.

What you’ll be doing:
A role in physical design for NVIDIA GPU and Mobile chips. Participate in various aspects of physical design, including full chip floorplanning, power/clock distribution, timing optimization, place & route, timing closure,



power/signal integrity analysis, and physical verification. Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention. Collaborate with RTL, DFT and Circuit designers to ensure high quality of design implementation.

What we need to see:
BS in Engineering or Science or equivalent experience. Power user of EDA tools from Synopsys (ICC2/FC/PT/STAR-RC), Cadence (EDI/Innovus/Voltus). Experience in Clock/Power Distribution, P&R;, Timing closure, RC Extraction, and verification on advanced technology nodes. 2+ years of experience in above areas.

Ways to stand out from the crowd:
MS in Engineering or Science. Knowledge in FinFET technology, circuit design, and package design. Experience in physical verification tools from Synopsys (ICV) or Mentor (Calibre). Proficiency in Perl, Python, TCL and Makefile scripts.

📌 Physical Design Engineer (Mumbai)
🏢 NVIDIA
📍 Mumbai