Senior Principal Analog Validation Engineer

Experience: Not Available to Not Available years

Location: Pune

Skills: MCU architectures, Embedded systems, JTAG, logic analyzers, scopes

Job responsibilities
Lead first-silicon bring-up, debug, and issue resolution. Oversee validation of: Analog block level validation – PMU (LDO, DCDC, GDET, FRO, OSC, References etc) , CGU (PLL etc) , ADC/DAC, WBIAS. System level validation and key customer MCU use cases validation Drive ATE and bench correlation. Low power optimizations to meet KPIs Ensure robust test plans, coverage models, and sign-off criteria. Own validation readiness for tape-out, risk production, and mass production. Set transparent goals, KPIs, and execution frameworks for validation programs. Partner closely with:



Design & Architecture teams Product Engineering Firmware/Software teams Manufacturing & Quality Standardize validation methodologies across sites. Provide regular program updates to senior leadership.

Job Qualification
Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related). 10–13+ years of experience in semiconductor validation (analog), product engineering, or silicon debug. Strong hands-on background in: MCU architectures Embedded systems Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.) Proven ability to lead large, distributed engineering teams. Excellent communication and executive presence More information about NXP in India... #LI-7013

📌 Senior Principal Analog Validation Engineer (Pune)
🏢 NXP Semiconductors
📍 Pune