Designation / Position: Analog Design Engineer

Job Description:

Design of complete Transceiver chain.

Design and simulation of the blocks like LDO/BGR/OTA/GPIO/IO blocks/DDR/PLLs/ADC/DAC/power amplifiers.

Owning the complete analog front-end and delivering this to SoC team.

Guide the layout engineer and so the post-layout verification

Preferred Skills

Proficiency in Cadence Design Workplace for Analog, Mixed-Signal (Cadence Analog Artist, Cadence Virtuoso, Spectre RF, Assura, NCSim).

Prior experience in designing the following in CMOS LO Dividers, mixers, LO buffers.

Analog PLLs (Charge pump, PFD, Loop-filter, Delta-sigma), Digital PLLs (TDC, Digital loop-filter), Polar modulators, Oscillators.

Continuous time and/or discrete time (switched cap) analog blocks (high linearity and low-noise Filters, analog amplifier stages, voltage references,



linear regulators, etc.)

Calibration circuits for compensating process/voltage/temperature variations L-C VCOs, L-C DCOs, DCROs

Prior Experience in silicon bring-up and characterization using digital, analog and RF test-equipment.

Scripting in Skill, Ocean, Perl, UNIX Shell, etc.

Education and/or Experience:

B.tech, M.tech/MS/MSc/Ph.D in Electronics/Electrical Engineering

Experience:

5 to 10 yrs Exp.

Qualification-

Minimum: UG:B.Tech/B.E. in Electronics/Electronics &Telecommunication; Desirable: PG:M.Tech in Electronics/Electronics &Telecommunication;

PhD: (Electronics/Electronics &Telecommunication;)

Work Location: In person

📌 Analogue Design Engineer (India)
🏢 Emriom Fze
📍 India