SMTS/Principal ASIC Design Engineer - PCI Design and Integration (Bengaluru)

SMTS/Principal ASIC Design Engineer - PCI Design and Integration (Bengaluru)

07 Aug
|
MarvyLogic
|
Bengaluru

07 Aug

MarvyLogic

Bengaluru

The Culture

The people are the culture. We encourage a culture of passion for technology solutions that impact businesses. We also make sure that our people pursue their individual passions. Working with us means you get an in-depth understanding of a range of industries and emerging technologies that help us build solutions that are futuristic and impactful. More importantly, the experience of being at MarvyLogic may help you evolve as a person toward enjoying a more fulfilling life.

10+ years Graduate Degree in Electrical/Electronics Engg. (post Graduate is a plus)Bengaluru/Bangalore

Job Description

- 10+ years of ASIC RTL Design experience and Verilog/System Verilog proficiency
- Experience with multiple clock and power domains
- Extensive experience in integration and validation of high speed PCIe IP core (including controller and PHY SerDes)
- Experience with PCIe protocol analyzers and debug
- Familiarity with PCIe driver and application software for Linux/Windows
- RTL Design and implementation of interface logic between PCIe controller and DMA engines for high performance networking application




- Create block-level micro-architecture specification and that outline interfaces, timing behavior, design tradeoffs, and performance goals
- Review vendor IP integration guidelines and verify the compliance throughout the design flow
- Run integrity check tools such as Lint/CDC/DFT/LEC/UPF to satisfy coding and implementation guidelines
- Participate in design verification process by reviewing test plans, coverage reports, writing assertions and other design modifications to improve verification quality
- Participate in physical implementation process by providing synthesis constraints, timing exceptions and making design updates to meet area, power and performance goals

Responsibilities

- Be able to work and communicate with multi-site teams
- Responsible for the review of FPGA netlist releases (block/chip)
- ASIC product life cycle experience (requirements, design, implementation, test and post-silicon validation)

📌 SMTS/Principal ASIC Design Engineer - PCI Design and Integration (Bengaluru)
🏢 MarvyLogic
📍 Bengaluru

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