Digital Verification Intern

Experience: Not Available to Not Available years

Location: Chandler, Arizona, United States

Skills: System Verilog, Verilog, Object Oriented Programming, Unix, Perl, Python, TCL, Universal Verification Methodology, UVM

Job Overview
Work alongside a worldwide team of Digital Verification Engineers focused on verification of power management/charger ICs for Automotive applications. Participate in the development and implementation of state-of-the-art verification methodologies.

Job Duties
Develop tests, checkers, and coverage attributes to verify different IC features as per the IC Requirements Specification and Verification Plan.
Run digital/mixed-signal verification simulations using industry standard EDA tools.
Simulation debug, and coverage closure.
Collaborate with other teams – Analog Design, Digital Design, Product Definition etc.

Required Skills
Candidate should be currently enrolled in Bachelors/Masters/PhD program in Electrical Engineering/Computer Engineering/Computer Science or similar.




Coding experience in System Verilog, or Verilog through prior coursework or qualified experience.
Course work or prior professional experience in digital verification or digital design.
Decent understanding of Object Oriented Programming concepts.
Scripting (Unix, Perl, Python, TCL etc).

Preferred Additional Skills
Universal Verification Methodology (UVM).
Course work or professional experience in Analog design.

More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-e41b

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