07 Aug
|
BITSILICA
|
Hyderabad
07 Aug
BITSILICA
Hyderabad
About the job Location: Bangalore and Hyderabad.
Experience: We are seeking individuals with 4 or more years of hands-on verification experience, with a primary focus on PCIe, DDR, ETHERNET, and CXL protocols.
Experience in IP/Subsystem/SOC ASIC Verification.
Hands-on expertise of working on Test Plan & Test bench development.
Proficient in writing test cases, simulation and debugging.
Experience in building Verification Setting from scratch using System-Verilog and methodologies like UVM.
Experience in developing Test Plan and Test Cases
Expertise in Coverage driven verification, Function coverage & Code coverage analysis
Hands on work experience on any of PCIe/Eth/USB/DDR/AXI etc
Experience With One Or more simulators from the major EDA suppliers (Cadence, Mentor Or Synopsys)
Positive Software Skills In Object Oriented Programming (OOP), C, C++, Perl, Tcl.
Qualification: We require candidates with a Bachelor's or Master's degree in Electronics, VLSI, or Embedded Systems. Interested can share your Resume with [Confidential Information]
📌 Lead /senior Design Verification Engineer Hyderabad
🏢 BITSILICA
📍 Hyderabad