Principal Engineer – Physical Design (Bengaluru)

Principal Engineer – Physical Design (Bengaluru)

10 Aug
|
Upscale AI
|
Bengaluru

10 Aug

Upscale AI

Bengaluru

Why join Upscale AI

Upscale AI is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $300M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.

We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical. Our team is talent-dense and high-performing. We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.

If you’re looking to do high-impact work, move rapid, and help define the infrastructure behind the future of AI—Upscale AI is where you can produce meaningful work at the frontier—and operate at a high standard.

Role Summary:
As a Principal Engineer – Physical Design, you will be responsible for leading the implementation of complex, high-performance ASIC/SoC blocks from RTL to GDSII. You will drive design execution, define physical implementation strategies,



and mentor engineers to achieve best-in-class Power, Performance, and Area (PPA) across advanced technology nodes.

Key Responsibilities:
- Own end-to-end physical design implementation for large hierarchical blocks, from floorplanning to GDSII signoff.
- Develop and optimize flows for placement, clock tree synthesis (CTS), routing, and timing closure.
- Analyze and optimize IR drop, EM, congestion, and power to meet stringent chip targets.
- Collaborate with RTL, DFT, STA, and power teams to resolve cross-domain issues and ensure robust closure.
- Define and maintain best practices, scripts, and automation flows (Tcl, Python, or Make-based).
- Lead timing, physical verification (DRC/LVS), and ECO closure at the block and top level.
- Provide technical leadership for floorplan architecture, partitioning, and clock distribution strategies.
- Drive design convergence on multi-corner multi-mode (MCMM) analysis and ensure si

📌 Principal Engineer – Physical Design (Bengaluru)
🏢 Upscale AI
📍 Bengaluru

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