The selected candidate will play a critical role in the architecture, design, verification, and implementation of RTL solutions for mixed-signal subsystems and standalone IPs. The role involves developing robust digital designs that interface with complex analog and mixed-signal circuits while ensuring power, performance, and area (PPA) targets are achieved.

Your role
Key responsibilities in your new role

Define, develop, verify, and implement RTL designs for mixed-signal subsystems and standalone IPs from concept through silicon realization.
Collaborate closely with analog, verification, and physical design teams to deliver high-quality mixed-signal solutions.
Architect and implement digital control logic for complex mixed-signal IPs, ensuring seamless integration and functionality.

Your profile
Qualifications and skills to help you succeed

Robust expertise in RTL design and development for mixed-signal IPs such as PLLs, ADCs, SerDes, PMUs, and complex signal-chain architectures.
Hands-on experience in designing and implementing Finite State Machines (FSMs)



and digital control logic for Power Management Units (PMUs) and related low-power applications.
Proficiency in developing and maintaining synthesis constraints (SDC), timing constraints, and implementing coverage-driven design methodologies.
Strong understanding and practical experience in low-power design techniques, including creation and maintenance of UPF (Unified Power Format) for designs spanning multiple power domains.
Experience with RTL coding in Verilog/System Verilog, linting, CDC/RDC analysis, synthesis, and timing closure methodologies.
Good understanding of mixed-signal design flows and digital-analog interface requirements.
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📌 Senior Staff Engineer Design (Bengaluru)
🏢 infineon
📍 Bengaluru