NoC ( RTL) Design - PE / Director (Bengaluru)

NoC ( RTL) Design - PE / Director (Bengaluru)

16 Aug
|
Qualcomm
|
Bengaluru

16 Aug

Qualcomm

Bengaluru

General Summary:

Design Engineer (18+ years of experience)
- SoC Interconnect for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. This position includes but no limited to:-
- NoC design lead and is part of BDC infrastructure (NoC/Interconnect) core team
- Responsible for specification, design and implementation of interconnect and related IPs
- Actively work with SoC team, verification team, physical design team, SoC Floorplan, core teams and various other interconnect teams in various other sites
- Partner with SoC performance team ensuring Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions
- Responsible for micro-architecting all relevant debug hooks in NoC Infrastructure to help root cause silicon issues
- Looks beyond existing methodologies and own discipline to define and resolve complex problems
- Manages large, potentially diverse teams of managers and/or senior professionals




- Provides input to functional or departmental strategy
- Create an impact on product competitiveness, roadmap and business objectives through Design/DV/Problem Solving
- Lead by example on customer problem solving related to NoC/Interconnect
- Minimum Qualifications:
- 18+ years of solid experience in IP/SoC design and micro-architecture
- Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts
- Valuable knowledge of Digital Design and RTL development
- Hands-on experience with SoC Design, Verilog RTL coding
- Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization.
- Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug
- Working knowledge of Lint, CDC, PLDRC, CLP etc
- Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timin

📌 NoC ( RTL) Design - PE / Director (Bengaluru)
🏢 Qualcomm
📍 Bengaluru

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