Overview
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional DFT engineer to join our DFT team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
As a PRINCIPAL ENGINEER, you’ll play a pivotal role in Handling different aspects of DFT for high-speed mixed signal Design, Low coverage debug for Stuck at and Transition, Silicon debug, taking initiative to deploy new flow. Supporting team whenever needed. In this fulltime role, you’ll report directly to our Dir Engineering. Our MIC Design team is dedicated to delivering high quality PMIC silicon, and your contributions will be instrumental in leading project, performing DFT tasks with quality, and delivering high quality patterns for silicon.
Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.




Responsibilities
Full DFT of Mixed Signal design.
Creating DFT IPs and deployment.
Debug different failure.
Low coverage analysis for both Stuck at and At-speed.
Working closely with cross functional teams to develop and verify DFT’s structures and constraints.
Work closely with Test Engineering for test program development, Silicon bring up, diagnosis, Yield improvement, Silicon Debug etc.
Work closely with EDA R&D; teams to propose and implement new features.
Hands on skill for scripting and flow deployment.
Understanding of MBIST, LBIST.
Qualifications
Tech /BE/ME/M Tech with 8-12 years of relevant hands-on experience in Design for Test (DFT).
Explicit understanding of key DFT concepts like Scan compression (EDT), Scan Stitching, fault models (stuck-at, delay tests, Small Delay, etc.), EDT, OCC etc.
Understanding of SOC DFT architecture.
Basic understanding of DFT for mixed signal designs.
Unde

📌 PE DFT (India)
🏢 Rambus
📍 India