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AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

SENIOR SILICON DESIGN VERIFICATION ENGINEER

THE ROLE:
The SMTS SoC Design Verification Engineer is responsible for leading the verification of complex SoC features and subsystems, driving verification methodology, ensuring high-quality silicon sign-off, and mentoring engineers across the verification organization. The role requires deep expertise in SoC architecture,



System Verilog/UVM, debug, coverage closure, and cross-functional collaboration

KEY RESPONSIBLITIES:
Own end-to-end verification of key SoC features and system-level scenarios.
Develop and execute comprehensive verification plans, testbenches, and regression strategies.
Drive functional, code, assertion, and scenario coverage closure.
Lead SoC/IP integration verification and sign-off activities.
Debug complex RTL, architecture, testbench, and firmware issues.
Collaborate closely with Architecture, RTL, Firmware, Emulation, Platform, and Validation teams.
Drive verification methodology improvements, automation, and productivity enhancements.
Support pre-silicon bring-up, emulation, and post-silicon debug activities.
Mentor and technically guide MTS/SDE engineers.
Drive execution toward program milestones such as LSB, LSC, LSD, and Tape-Out

PREFERRED EXPERIENCE:
Minimum 12+ years of experience in ASIC

📌 Senior SoC Design Verification Engineer (Hyderabad)
🏢 Advanced Micro Devices
📍 Hyderabad