Senior Design Verification Engineer (Hyderabad)

Senior Design Verification Engineer (Hyderabad)

20 Aug
|
eInfochips (An Arrow
|
Hyderabad

20 Aug

eInfochips (An Arrow

Hyderabad

Job Description

We are hiring experienced ASIC Verification Engineers with robust hands‑on expertise in SystemVerilog, UVM, and IP/SOC verification. The role involves leading a small team, defining testbench architecture, developing UVM environments, and driving coverage closure. Experience with debug tools (IUS/VCS/Questa/Verdi), scripting (Python/Perl/Shell), and protocols like AXI, PCIe, DDR, USB, CXL, Ethernet, etc., is highly preferred. Knowledge of CPU-based verification, NoC, low‑power/GLS is a plus. Strong ownership and communication skills are essential.

Experience: 6+ years

Location: Hyderabad/Bangalore/Noida/Ahmedabad/Pune/Chennai

📌 Senior Design Verification Engineer (Hyderabad)
🏢 eInfochips (An Arrow
📍 Hyderabad

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: senior design verification engineer (hyderabad) / hyderabad

Subscribe to this job alert:

Get the latest job offers by email for: senior design verification engineer (hyderabad) / hyderabad