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Position: Senior Analog Layout Engineer
Location: Bangalore
Experience: 4-8 Years
Employment Type: Full-Time

About the Role

Cyient Semiconductor is looking for a highly skilled Senior Analog Layout Engineer with strong expertise in Non-FinFET technology nodes to join our growing Analog/Mixed-Signal design team. The ideal candidate should have hands-on experience in layout implementation of complex analog and power management circuits, with a strong understanding of layout optimization techniques, matching requirements, reliability rules, and physical verification.

This role offers an opportunity to work on advanced Analog, Mixed-Signal, PMIC, and Power Management products across mature CMOS and BCD technologies.

Key Responsibilities
- Perform full-custom analog layout design from block level to top-level integration.
- Develop high-quality layouts for Analog, Mixed-Signal, and PMIC circuits.




- Work closely with Design Engineers to interpret schematics and floorplan requirements.
- Execute layout implementation adhering to performance, area, matching, and reliability constraints.
- Conduct layout reviews and ensure adherence to technology-specific design guidelines.
- Drive block-level and chip-level layout closure activities.
- Participate in tape-out and silicon bring-up support.

Layout Expertise Required

Candidate should have hands-on layout experience in:

Analog Circuit Blocks
- Bandgap References
- Current Mirrors
- Bias Circuits
- Operational Amplifiers (Op-Amps)
- Comparators
- Voltage References
- Oscillators
- ADC/DAC Related Layouts
- PLL Supporting Blocks

PMIC Blocks
- LDO Regulators
- Buck Converters
- Boost Converters
- Charge Pumps
- Power Sequencing Circuits
- Protection Circuits
- Driver Circuits

Mandatory Technical Skills

Process Technology Experience
- Robust experience in Non-FinFET nodes such as:
- 180nm
- 130nm

📌 Sr Analog Layout Engineer: Non Finfet (Bengaluru)
🏢 Cyient
📍 Bengaluru