Role Description
UST Job Title: Lead I - Semiconductor Product Validation
Who We Are
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
The Prospect
UST is looking for Semiconductor Product Validation Engineers.
Key Roles & Responsibilities
Debug Engineer with policy development deployment on Fleet must possess a combination of hardware architecture knowledge, firmware/software debugging skills, telemetry analytics expertise, and structured RCA methodology. Need excellent understanding of the complete infrastructure, firmware architecture, firmware deployment, boot flow analysis, fault-pattern identification, hardware / firmware / software / OS failure isolation, and remediation steps and remediation ownership. Should thoroughly understand:
Robust programming experience in C
Robust experience in Server Architecture and BIOS Validation & Debug
ARM-based SoC architecture
CPU cores, cache hierarchy, mesh/interconnect architecture
Memory subsystem (DDR5, DIMM topology, memory training)
PCIe architecture and device enumeration
BMC architecture and telemetry collection
NIC/OCP card architecture
Storage subsystem
Power delivery and board design basics
Boot chain (BMC → BIOS/UEFI → OS → Workload)
Analysing firmware deployment
Boot issues
Workload behaviour,
Hardware / Firmware / Driver / Software / OS fault identification
KQL expertise
Should be able to develop and deploy scalable fault-code policies
Ability to develop the detection logic
Ability to develop investigative fault codes
Ability to create automated compliant fault code with remediation actions
Fleet-wide prevention mechanisms, etc
Expert-Level Competency Matrix
Area
Expected Level
Cob