Job DescriptionSenior Memory Design Engineer
nExperience- (4–8 Years)
nLocation: Hyderabad
nAbout the Role
nJoin a high-performance silicon engineering team developing next-generation SRAM and memory IP for advanced SoCs. You will drive memory architecture, circuit design, characterization, and silicon optimization to deliver high-speed, low-power, and robust memory solutions across leading-edge process technologies.
nKey Responsibilities
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Design and optimize SRAM and memory circuits for performance, power, area, and yield.n
Develop memory building blocks including bitcells, sense amplifiers, write drivers, row/column decoders, precharge circuits, redundancy, and peripheral logic.n
Perform transistor-level design, simulation, and verification across PVT corners, Monte Carlo, noise, and reliability analyses.n
Drive post-layout verification (PEX) and collaborate with layout teams for optimal matching and manufacturability.n
Support silicon bring-up, characterization, failure analysis, and yield improvement.n
Work closely with architecture,



physical design, DFT, and product engineering teams throughout the memory development lifecycle.n

nRequired Qualifications
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B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, or related discipline.n
4–8 years of hands-on experience in SRAM or memory circuit design.n
Solid understanding of CMOS device physics, transistor-level design, memory architecture, stability, and reliability.n
Proficiency with Cadence Virtuoso, Spectre, ADE XL/Assembler, and extraction tools such as Calibre xRC/StarRC.n
Experience with post-layout simulation, PEX, LVS/DRC, EM/IR, and silicon correlation.n
Scripting experience in Python, SKILL, Perl, or TCL is a plus.n

nPreferred Experience
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Experience with advanced process nodes (FinFET technologies).n
Exposure to high-performance CPU, GPU, AI Accelerator, Networking, or Data Center SoCs.n
Knowledge of low-voltage memory de

📌 Senior Memory Design Engineer Hyderabad
🏢 leadsoc technologies
📍 Hyderabad