Company Description Corp Match Private Limited (Corpmatch) is a placement-focused training and hiring ecosystem dedicated to transforming students into industry-ready professionals. The company partners with colleges and organizations to bridge the gap between academic learning and corporate expectations through structured, outcome-driven programs.

Corpmatch offers IT and non-IT skill development, financial domain training, corporate readiness and interview preparation, campus hiring partnerships, and industry-aligned certification programs. Its mission is to reduce the skill gap, improve employability, and create meaningful career opportunities across India by providing practical exposure and reliable, trained talent. Corpmatch collaborates closely with educational institutions, companies, and learners to build a sustainable future workforce.

Role Description The Design For Test Engineer is a full-time, in office role based in Bengaluru South. This role focuses on developing and implementing Design for Test (DFT) strategies for digital and mixed-signal integrated circuits, ensuring high test coverage and manufacturability.

Day-to-day responsibilities include designing and integrating scan, BIST, boundary scan, and other DFT structures; creating test plans and patterns; and collaborating with design, verification, and product engineering teams to optimize testability, yield, and quality. The engineer will analyze test results, debug failures, work with test engineering to bring up and maintain production test programs,



and contribute to continuous improvement of DFT methodologies and workflows. The role may also involve documentation of DFT architecture, supporting customer or internal audits, and mentoring junior engineers on testability best practices.

Qualifications

- Candidates should possess strong knowledge of digital IC design fundamentals, logic design, and CMOS concepts.
- Candidates should possess skills in DFT methodologies such as scan insertion, ATPG, BIST, JTAG/boundary scan, and test coverage analysis.
- Candidates should possess experience with EDA tools for synthesis, DFT insertion, simulation, and timing verification.
- Candidates should possess proficiency in hardware description languages (e.g., Verilog, VHDL) and scripting (e.g., Python, TCL, Perl) for automation.
- Candidates should possess familiarity with SoC architectures, semiconductor manufacturing flow, and production test processes (ATE).
- Candidates should possess strong analytical, problem-solving, and debugging abilities with attention to detail.
- Candidates should possess effective communication and collaboration skills to work with cross-functional engineering teams on-site.
- A bachelor’s or master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field is preferred.
- Experience in DFT for complex SoCs, low-power design considerations, or safety-critical applications (e.g., automotive, medical) is beneficial.
- Exposure to industry standards and best practices for testability, quality, and reliability will be an added

📌 Design For Test Engineer (Bengaluru)
🏢 Corp Match Private
📍 Bengaluru