n Your Role:

n-Own feasibility studies for defining the system architecture, requirements, and external interfaces;

n· Develop microarchitecture and logic design in collaboration with functional leads to deliver design from architecture to tape-out;

n· Perform RTL coding, Lint checks, CDC tests, and creating timing constraint files;

n· Work closely with Synthesis, STA, PD, and DFT teams to meet all functional requirements , performance, power, and area goals;

n· Develop flows and tools as necessary in support of design activities.

nn Your profile:

nn Work location: PAN India

n NP: Max 45days

n· 8+ year experience in VLSI design ;

n· BSC/MS C in Electrical/Computer engineering;

n· Robust Verilog/System Verilog or VHDL skills;





n· Experience in defining microarchitecture and design of complex design units;

n· SoC design experience;

n· Proficient in advance d design practices (Lint, CDC, and Low Power Design);

n· Proficient with the various backend tools (synthesis and STA);

n· Familiar with CPU (ARM, RISC-V, or x86) instruc tion set;

n· Proficiency using Perl/C/Python scripting and programming;

n· Verification methodologies understanding;

n· Good communication and interpersonal skills.

n

📌 RTL Design Leads/Architect | 9-12yrs (Bengaluru)
🏢 Capgemini Engineering
📍 Bengaluru