Job Summary

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional DFT engineer to join our DFT team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a Principal Engineer, you will play a pivotal role in handling different aspects of DFT for high-speed mixed-signal design, low-coverage debug for stuck-at and transition, silicon debug, taking the initiative to deploy current flow, supporting the team whenever needed. In this full-time role, you will report directly to our Director of Engineering. Our MIC Design team is dedicated to delivering high-quality PMIC silicon, and your contributions will be instrumental in leading projects, performing DFT tasks with quality, and delivering high-quality patterns for silicon.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities

- Full DFT of mixed-signal design.
- Creating DFT IPs and deployment.
- Debug different failures.
- Low-coverage analysis for both stuck-at and at-speed.
- Working closely with cross-functional teams to develop and verify DFT structures and constraints.




- Work closely with Test Engineering for test program development, silicon bring up, diagnosis, yield improvement, silicon debug, etc.
- Work closely with EDA RD teams to propose and implement new features.
- Hands-on skill for scripting and flow deployment.
- Understanding of MBIST, LBIST.

Qualifications

- BTech/BE/ME/MTech with 8-12 years of relevant hands-on experience in Design for Test DFT.
- Clear understanding of key DFT concepts like scan compression (EDT), scan stitching, fault models (stuck-at, delay tests, small delay, etc.), EDT, OCC, etc.
- Understanding of SOC DFT architecture.
- Basic understanding of DFT for mixed-signal designs.
- Understanding of Synthesis, RTL coding, STA.
- Hands-on experience with Tessent ATPG tool is preferable.
- Silicon debug skill and sign-off.
- Experience in at least one scripting language like Perl, Python, TCL, or Shell is preferred.
- Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
- Excellent written and verbal communication skills.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 PE DFT Professional (Bengaluru)
🏢 Rambus Chip Technologies
📍 Bengaluru