DFT Engineer

Location: Bangalor eNotice Period: Immediate to 30 days

:We are looking for a skilled DFT Engineer with 8–15 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.

Key Responsibilities:
Develop and implement DFT architecture including scan insertion, ATPG, MBIST, and boundary scan.
Work on RTL design modifications for DFT features
Generate and validate test vectors using tools like Tetramax/Fastscan
Run gate-level simulations and debug test coverage issues
Perform pattern validation on emulation/silicon platforms
Collaborate with RTL, PD,



and validation teams for seamless DFT integration.

Required Skills:
Solid knowledge of DFT concepts: scan, compression, boundary scan, ATPG, BIST (LBIST/MBIST).
Experience with tools such as Synopsys DFT Compiler, Tetramax, Mentor Tessent.
Scripting skills in Python, Perl, or TCL for automation.
Familiarity with STA, synthesis, and timing constraints
Valuable understanding of RTL-to-GDS flow

Valuable to Have
Exposure to automotive or high-reliability designs
Experience with silicon bring-up and pattern debug.

📌 Dft Engineer Bengaluru
🏢 ACL Digital
📍 Bengaluru