- Robust SV and UVM Knowledge.
- Hands-on Experience on SoC/Sub-system /block level verification, knowledge of coverage-driven methodology
- Experience on protocols like PCIe/USB/UCIe/CXL/Ethernet/AMBA/MIPI
- Solid understanding of digital hardware design and Verilog HDL.
- A detailed understanding and experience of the current verification strategies required for sophisticated SoC development, including software-based techniques
- Good knowledge of test plan creation and tracking
- Experience with Perl, Python or other scripting language