04 Sep
|
Marvell Technology
|
Hyderabad
04 Sep
Marvell Technology
Hyderabad
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling current possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Senior Staff Engineer, Design For Test at Marvell, you will be a key DFT execution lead within the Custom Silicon Engineering team. Working on leading-edge ASIC/SoC designs for custom AI, XPU, and high-performance compute markets, you will own DFT implementation for complex IP and SoC partitions while contributing to methodology development and mentoring junior engineers.
This role requires a specialized DFT engineer recognized as an expert within the team with broad execution and some architectural experience.
What You Can Expect
- Lead DFT implementation for assigned SoC partitions or IP blocks across Custom and XPU programs: scan insertion, MBIST, IJTAG, ATPG pattern generation, and DFT validation using Tessent or TestMax.
- Execute DFT flows from RTL through gate-level, including Spyglass DRC, LEC equivalence checking, STA for DFT test modes, and test data volume (TDV) optimization.
- Contribute to DFT architecture discussions for assigned designs; implement defined DFT architectures with high-quality, first-time-right execution.
- Develop and maintain DFT scripts, automation, and methodology improvements within the M1DPx flow infrastructure.
- Support post-silicon bring-up: debug scan chains, ATPG pattern failures, MBIST issues, and IJTAG network commissioning on ATE and bench.
- Collaborate with Physical Design teams on scan chain assignment, OCC insertion, and DFT physical integratio
📌 Senior Staff Engineer, Design For Test (Hyderabad)
🏢 Marvell Technology
📍 Hyderabad