Job DescriptionRole Responsibilities Nn Design and develop analog and mixed-signal IC blocks such as bandgap references, LDOs, bias circuits, oscillators, amplifiers, comparators, ADC/DAC support circuits, current/voltage sensing circuits, level shifters, and high-voltage interface circuits N Own the full design cycle from specification definition, architecture selection, transistor-level design, simulation, layout guidance, post-layout verification, silicon bring-up, characterization, and production support. N Perform detailed simulations across PVT, mismatch, Monte Carlo, noise, stability, transient, startup, PSRR, CMRR, and reliability conditions. N Work closely with layout engineers to guide floorplanning, matching, shielding, routing, parasitic-aware layout, ESD/latch-up considerations, and post-layout debug. N Collaborate with digital, verification, applications, test, product, and systems teams to ensure the design meets product-level requirements. N Analyze silicon measurement results, correlate silicon behavior with simulation, identify root causes, and drive design fixes when needed. N Support design documentation, design reviews, FMEA, production test definition, and customer/debug activities as required. NnRequired Qualifications Nn BSEE/MSEE/PhD in Electrical Engineering or related field. N 5+ years of hands-on analog or mixed-signal IC design experience. N Robust fundamentals in CMOS analog design, device physics, feedback systems, noise, mismatch, stability, sampling circuits, and layout-dependent effects. N Experience designing one or more of the following: precision references, regulators, amplifiers, ADC/DAC circuits, sensor interfaces,



oscillators, high-voltage analog circuits, or power management blocks. N Solid experience with Cadence Virtuoso, Spectre, ADE, Monte Carlo analysis, corner simulations, and post-layout extraction flows. N Ability to debug complex analog issues using simulation and silicon data. N Good understanding of layout techniques for precision analog design, including matching, common-centroid layout, guard rings, isolation, shielding, and parasitic control. N Ability to work independently, take ownership of blocks, and drive them to tapeout-quality completion. NnPreferred Qualifications Nn Experience with BCD, high-voltage CMOS, automotive, industrial, battery management, optical control, or precision sensing products. N Experience with sigma-delta ADCs, SAR ADCs, current sensing, temperature sensors, bandgaps, LDOs, charge pumps, or isolated/high-voltage interfaces. N Familiarity with reliability checks, ESD/latch-up constraints, EM/IR, antenna, DRC/LVS, and foundry design rules. N Experience with siliconbring-up, bench characterization, ATE correlation, and production yield improvement. N Knowledge of Verilog-A modeling, MATLAB/Python data analysis, or mixed-signal verification is a plus. NnDesired Attributes Nn Strong analyticaland debugging mindset. N Practical, silicon-oriented design judgment. N Ability to balance performance, area, power, schedule, and risk. N Good communication skills and ability to work across global engineering teams. N Comfortable working in a fast-paced startup environment with high ownership and limited hand-holding. NnSend your CV to [email protected]

📌 Senior Analog Design Engineer (Vasanthanagar)
🏢 PI Semiconductor
📍 Vasanthanagar