LTST-L&T; Semiconductor Technologies LimitedBengaluru
- Posted On
- 27 Jan 2026
- End Date
- 26 Jul 2026
- Required Experience
- 2 - 5 Years
Skills:
Knowledge & Posting Location
LOW POWER SYSTEMS
SOC
POWER ESTIMATION
POWER OPTIMIZATION
Minimum Qualification
BACHELOR OF TECHNOLOGY (BTECH)
Job Description:
Purpose:
As a SoC Low Power design and implementation engineer in the SoC team in the semiconductor industry, the role includes working on the Soc level power analysis, power rollup, defining SoC power targets and implementation of power targets till tape-out and on silicon. The role also includes creating a SoC power rollup tool. As a collaboration partner working with Frontend and Backend teams to estimate power and enable methodologies to estimate, analyse and optimize power. This position involves technical expertise and problem-solving skills to manage the estimation and projects effectively. Here are the key responsibilities and tasks typically associated with this role:
Key Responsibilities:
- Power Estimation - Creating the Power models for various IPs after understanding their usecase properly. The models should be smart enough to track the silicon-proven power across various system and functional configurations
- Power Estimation - Creating a Power model for entering all the aspects of power at SoC level, this is to be created in a bottoms-up manner to include power of logic, memories and all the various AMS and other IPs.
- Power Optimization - Create methodologies with Frontend and Backend teams to estimate power and enable methodologies to analyse and optimize power at SoC level.
- Power Optimization - Creating a Power Budget for each SoC, each block inside the SoC and ensuring the target is met. In order to achieve this ensure various tool based power optimization features are enabled and executed at every stage of the SoC design.
- Coordinate with other departments, such as Analog IP Teams, Functional Integr
📌 SOC Ams Low Power (Bengaluru)
🏢 Larsen and Toubro
📍 Bengaluru
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