Job Description

Experience

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5+ years of relevant industry experience

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Education

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B.E / B.Tech (Required)

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M.E / M.Tech (Preferred)

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Key Responsibilities

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- Design and implement RTL using VHDL
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- Develop and debug FPGA-based SDR systems using Xilinx Vivado
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- Work on communication system design (Drone detection, DSSG)
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- Perform timing analysis, XDC constraints, and timing closure
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- Implement DSP blocks and signal processing algorithms
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- Work with communication protocols (Ethernet, high-speed interfaces)
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- Integrate FPGA with RF front-end (ADC/DAC, AD9361/AD9364)
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- Support verification (UVM preferred)
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- Debug hardware using oscilloscope and logic analyzer
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- Use Python for automation and testing
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- Collaborate with RF, hardware, and software teams
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Required Skills

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- Solid VHDL / RTL design expertise
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- Good understanding of digital logic and communication systems
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- Hands-on experience with Xilinx Vivado
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- Knowledge of timing closure and FPGA constraints
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- Familiarity with DSP and SDR-based system design
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- Basic knowledge of drone RF signals / detection
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- Experience in lab debugging
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- Good communication and problem-solving skills
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📌 FPGA Engineer III (Tamil Nadu)
🏢 Big Bang Boom Solutions Private
📍 Tamil Nadu