Job DescriptionKey Responsibilities:
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Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU. N
Participate in definingthe architecture and microarchitecture features of the CPU design. N
Write RTL and optimize logic for power, performance, area, and timing goals. N
Ensure design integrityfor physical implementation through effective strategies, tools, and methods. N
Review verification plans to ensure design features are correctly validated and resolve failing RTL tests. N
Document microarchitectural specifications (MAS) for the CPU features. N
Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block. N
nMinimum Qualifications:
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7+ years experience in RTL design using Verilog, V2K, or System Verilog, with solid knowledge of hardware modeling and logic debug environments. N
5+ years experience with up-to-date energy-efficient and low-power logic design methods,
including techniques applicable to high-frequency optimization. N
5+ years experience in Cross-clock domain crossings and power aware design. N
3+ years experience in scripting languages such as TCL, Perl, or Python. N
nPreferred Qualifications:
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Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling. N
Comprehensive knowledgeof Intel Architecture ISA and system architecture, including x86 assembly language. N
Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays. N
Familiarity with circuit planning and timing convergence processes. N
Ability to leverage broad understanding of CPU architecture to deliver impactful solutions. N
Proficient with static timing analysis, UPF and lint checks. N
Positive communication skills. N