Design And Verification Engineer Hyderabad

Design And Verification Engineer Hyderabad

10 Sep
|
HCLTech
|
Hyderabad

10 Sep

HCLTech

Hyderabad

We are seeking a highly skilled and motivated Design Verification Engineer to join our semiconductor engineering team. In this role, you will be responsible for validating the functionality, performance, and quality of next-generation ASIC and SoC designs. You will work closely with cross-functional teams to develop robust verification solutions, identify design issues, and ensure successful silicon implementation.

Key Responsibilities
Develop and execute comprehensive verification strategies and plans using industry-standard methodologies such as Universal Verification Methodology (UVM).
Design, build, and maintain scalable and reusable verification environments and testbenches to achieve high functional and code coverage.
Perform RTL verification using leading simulation tools such as Synopsys VCS, Cadence Xcelium/Incisive, and ModelSim/QuestaSim.
Debug simulation failures, analyze results, and identify root causes of design and functional issues.
Collaborate closely with RTL designers, architects, and system teams to resolve bugs and ensure design quality.
Develop verification components, assertions, checkers, and test scenarios to improve verification efficiency and coverage.




Participate in design and code reviews, ensuring compliance with verification best practices and coding standards.
Continuously evaluate and adopt current verification methodologies, tools, and automation techniques to enhance productivity and quality.

Required Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, Electronics, or a related discipline. A Master's degree is preferred.
5 + years of hands-on experience in ASIC and/or SoC design verification.
Robust understanding of digital design fundamentals, including combinational and sequential logic, finite state machines, and bus protocols.
Proven experience in developing and debugging complex verification environments.
Proficiency in SystemVerilog, Verilog, or VHDL, with solid knowledge of UVM-based verification methodologies.
Experience with functional coverage, assertions, and verification metrics.
Strong analytical, debugging, and problem-solving skills.
Excellent interpersonal, communication, and teamwork abilities.

📌 Design And Verification Engineer Hyderabad
🏢 HCLTech
📍 Hyderabad

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