Your Role: -Own feasibility studies for defining the system architecture, requirements, and external interfaces; - Develop microarchitecture and logic design in collaboration with functional leads to deliver design from architecture to tape-out;

- Perform RTL coding, Lint checks, CDC tests, and creating timing constraint files;
- Work closely with Synthesis, STA, PD, and DFT teams to meet all functional requirements, performance, power, and area goals;
- Develop flows and tools as necessary in support of design activities.

Your profile: Work location: PAN India NP: Max 45days - 8+ year experience in VLSI design;

- BSC/MSC in Electrical/Computer engineering;
- Solid Verilog/System Verilog or VHDL skills;
- Experience in defining microarchitecture and design of complex design units;
- SoC design experience;
- Proficient in advanced design practices (Lint, CDC, and Low Power Design);
- Proficient with the various backend tools (synthesis and STA);
- Familiar with CPU (ARM, RISC-V, or x86) instruction set;
- Proficiency using Perl/C/Python scripting and programming;
- Verification methodologies understanding;
- Good communication and interpersonal skills.

📌 RTL Design Leads/Architect | 9-12yrs (Bengaluru)
🏢 Capgemini Engineering
📍 Bengaluru