28 Sep
|
LanceSoft
|
Tiruchirappalli
28 Sep
LanceSoft
Tiruchirappalli
We’re looking for someone with strong hands-on experience in ATPG, scan, and DFT flows, with the ability to independently handle DFT tasks and debug complex issues.
Must Have
- 3+ years of SoC/ASIC Digital Design with DFT experience
- Strong hands-on ATPG experience
- ATPG coverage analysis and fault coverage improvement
- ATPG pattern verification using no-timing and SDF-annotated simulations
- Debugging simulation miscompares and root-cause analysis
- Knowledge of scan chain insertion and DFT insertion flows
- Valuable understanding of MBIST
- Strong problem-solving and systematic debugging skills Good to Have:
- DFT architecture experience
- Compression scan, LBIST, and advanced scan technologies
- JTAG 1149.1/1149.6, IEEE 1500, IEEE 1687
- Hands-on experience with Cadence DFT tools/flows
- Synthesis and Verilog testbench debugging
- Timing analysis and equivalency checks
📌 DFT Engineer (Tiruchirappalli)
🏢 LanceSoft
📍 Tiruchirappalli