Responsible for developing verification strategies for analog and mixed-signal circuits and systems, executing test plans, and ensuring that products meet the technical specifications and quality requirements before they go into production.
Key Responsibilities:
Verification Planning: Develop detailed verification plans for analog and mixed-signal circuits based on the circuit specifications and architectural requirements.
Testbench Development: Design and implement mixed-signal testbenches in Verilog-AMS, VHDL-AMS, or similar settings.
Simulation and Analysis: Perform simulations to verify the functionality and performance of analog and mixed-signal components. Use tools like Cadence Virtuoso, Mentor Graphics, or Synopsys environments.
Debugging: Identify and debug issues in AMS circuits and systems at both the schematic and layout levels.
Documentation: Document verification processes and results, ensuring thorough traceability of the verification flow and outcomes.
Collaboration:
Work closely with design engineers to understand circuit behavior and refine the design based on verification feedback.
Tool and Methodology Development: Contribute to the development of new verification methodologies and improvement of existing tools to enhance verification efficiency and effectiveness.
Required Skills and Qualifications:
Bachelor’s or Master’s degree in Electrical Engineering, Electronic Engineering, or related field.
Experience with AMS verification tools such as Cadence Virtuoso, Mentor Graphics AMS Designer, Synopsys CustomSim, etc.
Proficiency in languages like Verilog-AMS, VHDL-AMS, MATLAB, and/or Python.
Solid understanding of analog and digital circuit design principles.
Excellent analytical and problem-solving skills.
Valuable communication and teamwork abilities.
Preferred Skills:
Experience in low-power circuit verification.
Knowledge of industry standards and regulatory requirements relevant to analog and mixed-signal designs.
Advanced degree in a relevant field