Required Qualifications

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Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
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6–8 years of experience in SoC or subsystem design.
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Robust knowledge of ARM architecture, AMBA protocols (AXI, AHB, APB), and system-level integration.
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Hands-on experience with Arm Corestone-based packages or similar ARM reference designs.
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Solid experience in ASIC front-end design, including RTL development and integration flows.
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Proficiency in Static Timing Analysis using Primetime or Cadence tools.
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Experience in ASIC synthesis, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) techniques using Spyglass.
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Familiarity with low-power design techniques, UPF, and tools like PowerArtist or Power Compiler (a plus).
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FPGA prototyping experience is desirable.
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Robust debugging skills across simulation, lint, CDC, and synthesis environments.
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Ability to collaborate in a quick-paced, cross-functional engineering environment
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📌 Soc Design Engineer Hyderabad
🏢 Best NanoTech
📍 Hyderabad