Senior Design Verification Engineer / Lead

Experience : 9 - 14 Years

Location : Bangalore / Kochi / Chennai / Pune

Job Type : Full-time

About the Role :

We are seeking an experienced Senior Design Verification Engineer / Lead to drive verification activities for complex IP/SoC projects. The role requires strong hands-on expertise in SystemVerilog, UVM, AMBA protocols, ARM CPU verification, and verification environment architecture, along with the ability to independently own verification deliverables.

Key Responsibilities :

- Own verification strategy and execution for complex IP, subsystem, or SoC-level projects.
- Architect, develop, and enhance scalable SystemVerilog/UVM verification environments.
- Define verification plans, test strategies, coverage goals, and regression methodologies.
- Develop reusable verification components including monitors, drivers, scoreboards, checkers, sequences, and assertions.
- Drive constrained-random verification, functional coverage, code coverage, and coverage closure.
- Lead verification of AMBA protocols and ARM CPU-based systems.
- Work on PCI Express and/or Ethernet protocol verification as required.
- Analyze complex failures and lead root-cause debugging across RTL, testbench, and system-level environments.
- Collaborate closely with RTL designers, architects, firmware, validation, and system teams.
- Identify verification gaps and introduce automation and process improvements.
- Develop automation frameworks and utilities using Python, Perl, Shell,



and Makefile.
- Review verification code, test plans, coverage reports, and debug methodologies.
- Mentor junior and mid-level verification engineers.
- Track project progress, risks, bugs, coverage, and verification sign-off criteria.

Required Skills :

- 9 - 14 years of hands-on experience in Design Verification.
- Strong expertise in SystemVerilog and UVM.
- Proven experience architecting and implementing functional verification environments.
- Strong knowledge of AMBA protocols and ARM CPU architecture.
- Experience with PCIe and/or Ethernet protocols is highly desirable.
- Strong understanding of constrained-random verification, assertions, functional coverage, and coverage closure.
- Excellent debugging and root-cause analysis capabilities.
- Robust Unix/Linux experience.
- Experience with configuration management, bug tracking, regression, and verification dashboarding tools.
- Strong scripting/automation skills using Python, Perl, Shell, and/or Makefile.
- Ability to independently drive verification milestones and deliverables.

Preferred Skills :

- Experience in complex SoC, CPU, subsystem, or high-speed interface verification.
- Experience defining verification architecture and methodology for new projects.
- Exposure to formal verification or other advanced verification methodologies.
- Strong code review and mentoring experience.
- Excellent communication and cross-functional collaboration skills

📌 Senior Design Verification Engineer/Lead - UVM/AMBA Protocols (India)
🏢 Neurealm
📍 India