We are hiring for one of our top leading semiconductor client. If you're interested and your experience matches the requirement, we'd love to hear from you.
- Exp with critical tiles handling - challenges of floorplan/Placement/Routing/Timing/EM-IR/PhyV/FCT
- Understanding dependencies - RTL/FCFP/PD/Timing/PV etc
- Full Chip understanding and exposure will be add-on