Design Verification Engineer - Senior / Lead / Sr. Lead
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Job Description:
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- Must have good knowledge on the verification flows.
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- Excellent hands-on debug skills and problem solving attitude..
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- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
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- Experience of working on Functional Verification, SoC Verification, Emulation
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- Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language.
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- OVM/UVM Methodology knowledge and experience
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- Must have good communication skills and the ability to work in a team workplace.
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- Preferably having experience in architecture such as x86 or ARM domain based SOCs
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having SOC/IP performance verification background is added plus
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Experience: 4 to 12 Years
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Location: Bangalore / Hyderabad
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Work Mode: Work from Office (WFO)
📌 Design Verification Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru
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