13 Oct
|
Sauvira Solutions Private
|
Bengaluru
13 Oct
Sauvira Solutions Private
Bengaluru
Company Description
Sauvira Solutions Private Limited is a semiconductor services startup driving India’s semiconductor revolution through advanced design, verification, and testing solutions. The company supports customers with end-to-end services including SoC design, RTL design and integration, FPGA implementation, and comprehensive verification and DFT capabilities. Its team of experienced engineers and domain experts focuses on accelerating time-to-market and improving product performance for global clients. Sauvira Solutions emphasizes innovation, quality, and close customer collaboration, using cutting-edge methodologies to deliver reliable, effective, and cost-effective semiconductor solutions. The organization is committed to empowering businesses to compete and grow in the digital age.
Role Description
This is a full-time, on-site ASIC RTL Design Engineer role based in Bengaluru. The engineer will be responsible for designing and coding RTL for complex digital blocks and subsystems, ensuring functional correctness and alignment with architectural specifications.
Day-to-day tasks include developing micro-architecture, writing synthesizable RTL, running and analyzing LEC and other checks, and collaborating with verification teams to support formal and functional verification. The role involves working closely with physical design teams to address timing, power, and area constraints, participating in design reviews, and contributing to design documentation and best practices. The engineer will also help debug design issues, optimize implementation for performance and power, and support tape-out activities across multiple projects.
Qualifications
• Strong digital Logic Design and micro-architecture skills, including understanding of synchronous design, finite state machines, and pipelined architectures.
• Exp: 3+ years in ASIC RTL
• Hands-on expertise in RTL Design and RTL Coding using hardware description languages such as Verilog and/or SystemVerilog.
• Know
📌 ASIC RTL Design Engineer (Bengaluru)
🏢 Sauvira Solutions Private
📍 Bengaluru