Dft Dv Engineer Bengaluru

Dft Dv Engineer Bengaluru

17 Oct
|
Smart Soc Solutions
|
Bengaluru

17 Oct

Smart Soc Solutions

Bengaluru

We are seeking highly skilled and motivated DFT-DV Engineers to join our dynamic team in Bangalore
As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of our digital designs through Design for Test (DFT) and Design Verification (DV) methodologies
The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN

Key Responsibilities:
DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodologies that enable effective testing of complex digital designs.
Scan and ATPG: Develop and maintain scan insertion, Automatic Test Pattern Generation (ATPG), and compression methodologies to achieve high test coverage.
Memory BIST: Implement and verify Memory Built-In Self-Test (MBIST) solutions for embedded memories in the design.
JTAG and Boundary Scan: Develop JTAG and Boundary Scan solutions to facilitate efficient testing and debugging of digital designs.
Power Management: Work on Power Gating (PG)



techniques to optimize power consumption during testing.
PHY-LP Integration: Collaborate with PHY teams to ensure seamless integration of low-power features into the design.
BSCAN Integration: Implement Boundary Scan (BSCAN) infrastructure to enhance testability and debug capabilities.
Verification: Verify DFT features and ensure their correctness through simulation and formal verification.
Documentation: Prepare detailed documentation, including DFT specifications, test plans, and reports.

Qualifications:
Bachelors or Masters degree in Electrical Engineering, Computer Science, or related field.
4 to 7+ years of experience in DFT-DV engineering.
Solid expertise in DFT methodologies, including scan, ATPG, MBIST, JTAG, BSCAN, and PG.
Proficiency in industry-standard EDA tools for DFT implementation.
Experience with low-power design and PHY-LP integration is a plus.
Excellent problem-solving skills and attention to detail.
Robust communication and teamwork skills

📌 Dft Dv Engineer Bengaluru
🏢 Smart Soc Solutions
📍 Bengaluru

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