At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Join us as we shape the future of AI and beyond. ASIC RTL DESIGN ENGINEER

This exciting position in AMD's Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to Productization. Member Technical Staff is expected to participate in and lead many aspects of a technical project including: thorough understanding of IP Architectural definition, u-Architecture development for individual IPs or IP subsystems, leading cross-functional IP teams from front-end development through Productization & ASICization.

This position requires an individual to be creative, team-oriented, technology savvy, able to lead large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution

You have a passion for modern, complex hardware and IP architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. A major part of your responsibility will be to participate in and take a lead technical role in most of the phases of the product development cycle from current product exploration, architecture through implementation, prototyping, validation and support including:
Evaluating and executing design and development plans for IPs
RTL design, IP Integration & documentation




Participating in and acting as a senior technical reviewer for various u-architecture and implementation reviews within the development organization
Working with stakeholders to develop comprehensive testing plans including Compliance and Interop testing
Critically Review and provide feedback on the Design Implementations and Verification plans
Acting as technical mentor to junior engineers

PREFERRED EXPERIENCE:

A minimum of 8 years of experience is required. Proven experience in Silicon IP development process, methodologies, Design for Test methodologies Experience with Verilog RTL design, VCS simulation tool, Perl/Shell scripting Proven experience in contributing to complex silicon tapeouts Detailed understanding and proven track record of developing any of the leading edge PCIe, Full featured DMAs, NVMe based Storage IP, networking IP solutions such as Ethernet, TCP/IP, RDMA IPs. The ideal candidate will be a proactive contributor to the RTL design methodologies Ability to work on complex issues where analysis situations or data requires an in-depth evaluation of variable factors.

ACADEMIC CREDENTIALS:

~ A Bachelor of Science Degree in Electrical Engineering or Computer Science, a master's degree or equivalent experience is required.

#AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's 'Responsible AI Policy' is available

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