As a part of Arm's Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is the development of comprehensive implementation and analysis methodologies.
Responsibilities
• Timing constraints development and validation for functional and test modes
• Timing analysis and closure responsibilities at block/subsystem level
• ECO generation and tracking to closure by collaborating with PD, Design, Constraint team and other partners
Required Skills And Experience
• Bachelor’s or master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.
Experience in performing timing closure at SoC level and block level
• Hands-on experience with industry leading STA and ECO generation tools(PrimeTime, Tempus, Tweaker)
• IP integration and timing signoff
• Strong data analysis and presentation skills
• Well versed with TCL/PERL or Python
• Work experience of 2-4 years in STA closure and Signoff methodologies
• Solid Communication and Problem-Solving Skills
Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset
Our 10x Mindset
At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are
📌 Physical Design Engineer (Bengaluru)
🏢 ARM
📍 Bengaluru
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