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Job Responsibilities:

- Lead the architecture, development, and integration of SystemC/TLM-2.0 virtual platforms for complex multi-core SoCs, including processors, interconnects, memory subsystems, peripherals, accelerators, and custom IPs. Own individual IP modeling and lifecycle maintenance, ensuring alignment with evolving specifications.
- Define and own the virtual platform modeling strategy, methodology, coding standards, and reusable model libraries across programs.
- Serve as technical lead for multiple IP models and full-system platforms, managing them from specification through release and lifecycle maintenance.
- Drive shift-left enablement by delivering virtual platforms early for firmware, driver, OS, and application bring-up ahead of RTL and silicon availability.
- Architect models of complex system behavior, including memory-mapped transactions, interrupts, DMA, cache coherency, power management, security, and bus protocols
- Define model validation and RTL correlation strategies, including co-simulation and hybrid emulation flows, regression infrastructure, and quality metrics.
- Integrate virtual platforms with third-party and open-source ecosystems such as QEMU, Synopsys Virtualizer, Cadence, Siemens, and Arm Fast Models, as well as debuggers and CI/CD pipelines.
- Work with architecture, hardware, software, verification, and product teams to set VP requirements, milestones, and deliverables aligned with program schedules.
- Lead post-silicon validation and debug support by reproducing field and silicon issues on virtual platforms, performing root-cause analysis, and feeding results back into models and specifications.
- Mentor and technically guide P1–P3 engineers through design and code reviews and technical growth.
- Represent the modeling team in cross-site technical forums, customer engagements, and industry standards discussions

Position Requirements:

- Minimum B.E./B. Tech or MS/M. Tech/Ph.D. in Electrical, Electronics, or Computer Science.
- B.E./B.



Tech with 8–12 years, MS/M. Tech with 6–10 years, or Ph.D. with 4+ years of relevant industry experience.
- Expert-level knowledge of SystemC, TLM-2.0, C, and modern C++ (C++14/17), including model performance optimization.
- Proven track record of architecting and delivering full-system SoC virtual platforms used in production software development.
- Deep experience with ARM and/or RISC-V processor architectures, including ISS/CPU model integration, boot flows, and software bring-up (bare-metal, RTOS, Linux).
- Strong understanding of SoC architecture, memory hierarchies, coherency protocols, interconnects, and hardware/software co-design.
- Experience with commercial or open-source VP tools and frameworks (e.g., Synopsys Virtualizer, Arm Fast Models, QEMU, Green Socs/QBox).
- Experience with RTL co-simulation, hybrid emulation, or model-to-RTL correlation methods.
- Proficient in Python and build systems (CMake) for automation, model generation, and validation.
- Hands-on experience with software development practices and tools such as Agile, Dev Ops, Git, Jenkins/Git Hub Actions, and code-quality tooling.
- Demonstrated technical leadership, including mentoring engineers, leading cross-functional initiatives, and influencing architecture decisions.
- Excellent debugging, analytical, and problem-solving skills across hardware/software boundaries.
- Strong verbal and written communication skills, including presenting technical strategy to stakeholders and management.
- Ability to work across a geographically dispersed team and deal with ambiguity in a fast-paced environment. Strong debugging, analytical, and cross-functional collaboration skills.
- Strong problem-solving skills and ability to work effectively in a fast-paced, collaborative environment
- Solid verbal and written communication skills
- Self-motivated team player with the ability to collaborate with team members of varying skillsets
- Ability to work effectively as part of a geographically dispersed team
Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

📌 Staff Engineer, Systems Design/Architecture Engineering (India)
🏢 Analog Devices
📍 India